发明名称 ADDRESS TRANSLATOR
摘要 <p>A memory addressing apparatus is described comprising a circuit responsive to a current external memory address on an input line and a signal generated by an auxiliary memory circuit for providing a current internal memory address for addressing an internal memory. For maximum program security, the above described components are all located in a single integrated circuit package.</p>
申请公布号 CA1155966(A) 申请公布日期 1983.10.25
申请号 CA19810371174 申请日期 1981.02.18
申请人 KAUFMAN, MARC 发明人 KAUFMAN, MARC
分类号 G06F21/22;G06F1/00;G06F12/06;(IPC1-7):G06F13/00 主分类号 G06F21/22
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