发明名称 METHOD FOR FABRICATING TUNGSTEN LINE WITH REDUCED SHEET RESISTANCE TUNGSTEN LAYER AND METHOD FOR FABRICATING GATE OF SEMICONDUCTOR DEVICE USING THE SAME
摘要 A method for fabricating a tungsten line with a reduced sheet resistance tungsten layer and a method for fabricating a gate of semiconductor device using the same are provided to reduce the contact resistance between the tungsten wiring and the semiconductor discrete device. A tungsten wiring manufacturing method comprises a step for forming a silicon containing layer(13); a step for forming a diffusion barrier membrane(14); and a step for forming a tungsten film; a step for performing a thermal process(100). The silicon containing layer is the polysilicon. The diffusion barrier membrane is formed on the silicon containing layer. The tungsten film is formed on the diffusion barrier membrane. The thermal process is performed on the tungsten film. The thermal process is performed under the hydrogen atmosphere. The tungsten wiring fills the contact hole which exposes the substrate. The contact hole is surrounded by the insulating layer. The tungsten wiring is formed on the poly silicon plug.
申请公布号 KR20090002646(A) 申请公布日期 2009.01.09
申请号 KR20070066170 申请日期 2007.07.02
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SUNG, MIN GYU;CHO, HEUNG JAE;LIM, KWAN YONG
分类号 H01L21/28 主分类号 H01L21/28
代理机构 代理人
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