发明名称 |
Audio signal recognition computer |
摘要 |
A signal encoder and classifier particularly adapted to speech recognition includes a buffer which is independently addressed by a new data writing address system and a buffered data reading system so that writing and reading of data may be accomplished on a time shared basis. This time shared operation permits serial writing and reading of the pattern data without interrupting income signal storage. The reading data address system utilizes stored addresses identifying the beginning and end of the signal patterns for addressing sequential patterns from the buffer.
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申请公布号 |
US4412098(A) |
申请公布日期 |
1983.10.25 |
申请号 |
US19810249296 |
申请日期 |
1981.03.30 |
申请人 |
INTERSTATE ELECTRONICS CORPORATION |
发明人 |
AN, BYUNG H. |
分类号 |
G10L11/02;G10L15/28;(IPC1-7):G10L1/00 |
主分类号 |
G10L11/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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