摘要 |
PHB. 32-678 12 A frequency synthesiser of the type which selects pulses from a clock pulse generator to provide a lower output frequency Fo, the synthesiser including an accumulator of the type which, for each input pulse thereto, adds a preselected increment Y to the accumulated value in the accumulator and gives an overflow pulse each time an accumulated value C (where C is equal to or greater than Y) is reached or exceeded and leaves any excess in the accumulator. Such an accumulator causes phase distortion in the output pulses and, according to the invention, each output pulse is delayed by an amount which depends on the residue in the accumulator in order to correct the distortion. |