发明名称 Current mirror circuit
摘要 A current mirror circuit having high accuracy in its current mirror transfer ratio lambda even when constructed of P-N-P transistors. The circuit includes two stages each having three transistors of one conductivity type and a fourth transistor of a different conductivity type. Two of the like transistors of each stage have a common base electrode and the third like transistor is connected between the common electrode and a reference potential. The fourth transistor of each stage has its base connected to an individual one of the collectors of the base-connected transistors and its emitter connected both to a current source and the base of the third like transistor. The emitters of the base-connected transistors of the first stage and the collectors of the fourth transistors of each stage are connected to a power supply. The emitters of the base-connected transistors of the second stage are connected to the collectors of the base-connected transistors of the first stage. The collector of one of the base-connected transistors of the second stage is connected to a current source as an input and the collector of the other base-connected transistor of the second stage is connected to a load as the output.
申请公布号 US4412186(A) 申请公布日期 1983.10.25
申请号 US19810251338 申请日期 1981.04.06
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 NAGANO, KATSUMI
分类号 G05F3/26;H03F3/34;H03F3/343;(IPC1-7):H03F3/04 主分类号 G05F3/26
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