| 摘要 |
<p>PURPOSE:To facilitate the detection of positions of memory cells at the time of poor analysis of memory cells by a method wherein position indicating patterns which can recognize the position of element patterns arranged regularly in a chip are provided in the same chip. CONSTITUTION:Many bit lines D and word lines W are arranged horizontally and vertically into the mat 1 of an N-channel MOS type large capacity memory array, and address marks are formed at fixed positions thereof. At this time, a mark forming layer is constituted of an Al layer 2 easy to be discriminated in appearance and a diffused layer 3 easy to be observed after etching, and small marks A1 of e.g. pentagons consisting of surface stepwise difference 4 on the Al layer 2 or the diffused layer 3 are provided every four data lines. Large marks A2 are put every 20 lines and 100 lines, and then the layers 2 and 3 can be formed in superposition according to necessity. Here, the numeral 5 represents a substrate, 6 a field SiO2 film, and 7 a layer insulation film. Thus, defective analysis, etc. is enabled in a short time.</p> |
