| 摘要 |
PURPOSE:To use effectively the storage area of a state information storage circuit, by handling state information as history data and suppressing the second and following tracing when this history data is a pattern repeated at a certain period. CONSTITUTION:A state information storage circuit 2 traces trace data (TRD) from an information processing circuit 1 at every fundamental clock. TRD is transmitted to buffer registers 5, 7, 9, and 11 and comparing circuits 13-16, and the strobe control of data TRD to each buffer is performed by a counter 3 and a decoder 4. Outputs of FFs 6, 8, 10, and 12 indicating the availability of TRD become ''1'' in accordance with the strobe of TRD, and respective outputs of buffers are sent to comparators 13-16. These outputs are compared with TRD sent from the circuit 1 in respective comparators; and if they coincide with each other, coincidence signals are outputted to AND circuits 17-20, and AND between these signals and respective outputs of FFs are operated in circuits 17-20, and results are sent to the decoder 4 through an NOR circuit 21, and the storage of data TRD into each buffer is stopped by the decoder 4 to suppress tracing of the circuit 2. |
