| 摘要 |
PURPOSE:To enable to operate the charge coupled device at a high speed even when input capacitance is large by a method wherein only the final stage gate of transfer gates is made to use insidely generated timing. CONSTITUTION:The final gate phi1L of the charge transfer electrodes is made to differ from the usual device, and the waveform is formed on a semiconductor substrate to be supplied to the gate electrode phi1L. The timing margins of signals phiR, phi1 are not necessitated because the falling of the signal phi1L is formed using timing of the signal phiR. Because the signal phi1 is supplied only to the final stage gate, load capacitance is small, gentle falling line of the signal phi1 can be made steep at the signal phi1L, and delay time up to times t1-t4 can be shortened extremely. |
