发明名称 |
STITCHED IC CHIP LAYOUT METHODS, SYSTEMS AND PROGRAM PRODUCT |
摘要 |
Stitched integrated circuit (IC) chip layout methods, systems and program products are disclosed. In one embodiment, a method includes obtaining from a first entity a circuit design for an IC chip layout that exceeds a size of a photolithography tool field at a second entity, wherein the IC chip layout includes for at least one stitched region of a plurality of stitched regions: a boundary identification identifying a boundary of the at least one stitched region at which stitching occurs and a type indicator indicating whether the at least one stitched region is one of: redundant and unique; dissecting the IC chip layout into stitched regions indicated as unique or redundant at the second entity; and generating a photolithographic reticle at the second entity based on the plurality of stitched regions, the photolithographic reticle having a size that fits within the size of the photolithographic tool field at the second entity.
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申请公布号 |
KR20090099053(A) |
申请公布日期 |
2009.09.21 |
申请号 |
KR20097010711 |
申请日期 |
2008.02.22 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DUNHAM TIMOTHY G.;LEIDY ROBERT K.;OGG KEVIN N.;RASSEL RICHARD J.;SHANMUGAM VALARMATHI C. |
分类号 |
G06F17/50;H01L21/00;H01L21/768 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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