| 摘要 |
<p>PURPOSE:To allow power-up operation and interruption to a CPU through one circuit even when a power source is turned off, by providing a timer and two gates which are controlled reciprocally. CONSTITUTION:When a switch 13 is turned on, a gate 22 turns on to supply the signal of the timer 11 to the IRQ terminal of a CPU1 for interruption processing mode, and a TR25 turns on to turns off a gate 23. When the switch 13 is turned off, the gate 22 turns off and the gate 23 turns on to turn on a swith 14 by the output of the timer 11. Consequently, electric power is supplied to the TR25 and the control terminal of the gate 22, which turns on while the gate 23 turns off to supply the signal from the timer 11 to the IRQ terminal of the CPU1, placing the CPU1 in interruption processing mode. Consequently, power-up operation and interruption request are allowed through one signal line 21 to save electric power.</p> |
