| 摘要 |
PURPOSE:To complete a wiring design for a large scale circuit in an extremely short period of time by a method wherein the introduction of macro-routes and division thereof into micro-routes are parallelly accomplished when wiring routes are to be detected in a large scale circuit. CONSTITUTION:Micro memory cells 21 are coupled into an array with the intermediary of registers 22, and the cell groups are regulated by circuits 23, 24, 25, 26. The circuit 23, connected to memory, gains access to memory in the cells, modifying a value at a given location in memory or reading a value stored at a given location. The circuit 24, connected to wiring route determining unit in the cells, put data into or take data out of the cells, acting in the same way as the circuit 23. The circuits 23, 24 both use microprocessors. The circuit 25 is a synchronizing circuit, supplying clock signals to the circuit 26. The circuit 26, connected to each of the cells and the circuits 23, 24, controls the circuits 23, 24. The circuit 26, connected to a computer with the intermediary of an interface, is provided with an external data output/input terminal 27. |
