发明名称 MIS SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enhance the degree of integration of the semiconductor device, while to enable to attain multilayer wiring by a method wherein MISFET's provided in a poly-silicon layer on an insulating film are utilized as load elements. CONSTITUTION:A first driving MISFET Q1 and the first load element Q2 are connected in series to be connected to an electric power source VDD, a second driving MISFET Q3 and the second load element Q4 are connected in series to be connected to the electric power source VDD, and the gate of the FET Q3 is connected electrically to the connecting part of the FET's Q1, Q2 to constitute the semiconductor integrated circuit. At this time, the gate of the FET Q3, a wiring from the gate of the FET Q3 to reach the connecting part of the FET's Q1, Q2 and a course from the connecting part thereof to reach the electric power source VDD through the load element Q2 are formed continuously according to semiconductor layers (poly-silicon layers) 17, 23, 18 formed on the insulating layers 22a, 22b on a single crystal silicon semiconductor substrate. Besides, the n type region 23 constitutes the channel region of the FET Q2.
申请公布号 JPS58175858(A) 申请公布日期 1983.10.15
申请号 JP19830050403 申请日期 1983.03.28
申请人 HITACHI SEISAKUSHO KK 发明人 WAKIMOTO HARUMI
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L27/06;H01L27/088;H01L29/78 主分类号 H01L27/04
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