发明名称 SWITCHING CIRCUIT OF ELECTRONIC CLOCK
摘要 PURPOSE:To prevent a current from increasing excessively even in case when a switch is held in an on-state by mistake, and also to prevent a malfunction caused by a noise, by opening and closing a switching element by an output signal of a timer. CONSTITUTION:In a correcting mode, when a crown 3 is rotated, a switch 6 repeats on and off intermittently, and while it is on, a switch input terminal SW becomes VDD potential through the switch 6, and an output of a chattering preventing circuit 12 also repeates ''1'' and ''0''. As a result, a correcting signal is supplied to a clock circuit 8 from a correcting circuit 13, the display is corrected, also while an output of the circuit 12 is ''1'', an output of an invertor 15 becomes ''0'' and reset of a timer 14 is released, and operation of the timer is started by counting of a clock CL. Subsequently, when measurement of the timer 14 ends, an MOSFET 11 is opened by its inverted output, a low resistance 10 is detached from an electric power supply terminal VSS, a current flows to the terminal SW through a high resistance 9, and waste current consumption of a battery 5 is prevented.
申请公布号 JPS58173486(A) 申请公布日期 1983.10.12
申请号 JP19820057126 申请日期 1982.04.06
申请人 CITIZEN TOKEI KK 发明人 ICHIKAWA SHINGO
分类号 G04G21/00;G04G99/00;H03K17/16 主分类号 G04G21/00
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