发明名称 DATA TRANSMISSION SYSTEM
摘要 PURPOSE:To simplify the multi-drop type transmission system and to improve the reliability and transfer efficiency, by providing a control line common to each station, and adding a clock generating circuit 4. CONSTITUTION:The clock generating circuit 4 transmits a pulse train in the period T to a control line 2 and supplies timing information common to each station unit SU. A pulse signal of a delay circuit 5 of the SUA is taken as a reference, a delayed timing is obtained and a sigificance signal is transmitted to an AND gate circuit 6. A data line vacancy detection circuit 7 checks whether or not a data line 3 is in use and transmits the significance signal to the AND circuit 6 when not in use. The significance signal is transmitted to the SUA when the transmission is requested via a signal line 8. A data line exclusive informing signal line 9 informs to a transmission/reception circuit 10 that the output condition of the AND circuit 6 is satisfied. A detection line 7 detects an idle data line, and when arrives a transmission request, the AND condition of the gate 6 is satisfied together with the delayed timing output, and a data line exclusive notice signal is fed to the circuit 10, and a transmission data is transmitted to a data line 3.
申请公布号 JPS58173939(A) 申请公布日期 1983.10.12
申请号 JP19820056858 申请日期 1982.04.06
申请人 MITSUBISHI DENKI KK 发明人 WATANABE AKIRA
分类号 H04L12/40 主分类号 H04L12/40
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