| 摘要 |
A pulse delay compensator for use with a divide counter dividing a frequency signal by a first positive integer or a second positive integer to produce a divided frequency signal and with the first and second positive integers a fixed number of integers apart and including controlling the divide counter to divide the frequency signal by the first or second positive integers, repetitively summing a fixed fractional number with each divide and with the control of the divide counter in accordance with each overflow produced by the repetitive summing, and producing pulse delay compensation for the divided frequency signal in accordance with the repetitive summing to equalize the pulse period between adjacent pulses in the divided frequency signal.
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