| 摘要 |
<p>PURPOSE:To perform highly reliable transmission by using an algebraic rule together with codes for frame synchronization, and also performing self-corrections of error bits simultaneously. CONSTITUTION:When the code of one frame inputted to a receiving terminal (b) is inputted to a shift register 14 for synchronism and a buffer register 12, the shift register 14 divides the input code by its generation polynomial g(x) and outputs the remainder. Once a synchronism detecting circuit 13 detects the output of the shift register 14 becoming 0, a polyphase clock generating circuit 16 is reset to perform transfer to a shift register 11 by a clock showing the end of the clock, and then the received code from the buffer register 12 is corrected and transferred to a trailing buffer register 17. On the output side of the shift register 17, the extraction of information and transmission to another terminal are carried out by the indication of a polyphase clock.</p> |
