| 摘要 |
PURPOSE:To reduce current consumption by making a phase comparison between a sampling signal and a reference signal of frequency which is almost an integral multiple of that of said signal. CONSTITUTION:The sampling signal Fs is inputted to a switching control circuit 42 and the reference signal Fr of frequency which is almost an integral multiple of that of the signal Fs is inputted to a phase comparing circuit 41. The signal Fr is inputted to one-side inputs of the AND gate 52 and OR gate 51 of the circuit 41 and a switching control signal S42 generated by the circuit 42 and its inverted signal -S42 are inputted to the other-side inputs to output a switching control signal S52 and a mode switching signal S51. The signal S52 is inputted to the circuit 42 and inverted at a part 54 to be ANDed at a part 53 with the signal Fs, and consequently a signal S53 is obtained to trigger an FF55, outputting signals S42 and -S42. The signal S51 is inputted to a mode storage circuit 43 to output a mode signal S43 and its inverted signal -S43 to a phase difference signal generating circuit 44, resetting the circuit 43 by the signal -S42. In the circuit 44, the signals S42, S43 and -S43 are received by an NAND gate 56 and an AND gate 57 to output phase difference signals Pp and Pn. |
