发明名称 |
METHOD AND APPARATUS FOR DIGITAL SIGNAL PROCESSING |
摘要 |
Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general purpose bus. Commands for controlling operations of the blocks and data of a stream are transferred through the bus. When an encryption encoder /decode is disposed in each block, contents transferred through the bus can be protected. When an encryption encoder / decode circuit is disposed in an interface to which an extension plug-in card is attached, contents that are output from the interface can be protected. <IMAGE> |
申请公布号 |
EP1146741(B1) |
申请公布日期 |
2016.08.24 |
申请号 |
EP20000976317 |
申请日期 |
2000.11.17 |
申请人 |
SONY CORPORATION |
发明人 |
NAKAMURA, MASASHI;MORIWAKI, HISAYOSHI;FURUI, SUNAO;HAMADA, ICHIRO |
分类号 |
G06F21/10;H04H20/00;H04H60/23;H04H60/95;H04L9/10;H04N5/00;H04N5/44;H04N5/46;H04N7/16;H04N7/167;H04N21/2347;H04N21/418;H04N21/426;H04N21/4367;H04N21/4405;H04N21/4408;H04N21/442;H04N21/81 |
主分类号 |
G06F21/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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