| 摘要 |
PURPOSE:To obtain a GaAs.MESFET of narrow gate width by a small number of processes by a method wherein an N type layer is formed at the surface layer part of a semi-insulating GaAs substrate, then a gate electrode and markers are provided thereon, and, based on the electrode and the markers, N<+> type layers and element isolation layers are formed by self-alignment. CONSTITUTION:Si<+> ions are implanted over the entire surface of the Cr doped semi-insulating GaAs substrate 21, and anneal-treated resulting in the formation of the N type layer 22, and then the gate electrode 23 of W silicide having a gate electrode pad 23', and the markers 24 are formed thereon. Next, after Si<+> ions are implanted with the electrode 23 as a mask, the N<+> type layers 25 integrated to the layer 22 are generated at the both sides of the electrode 23 by being annealed, and accordingly the layer 22 is made to remain under the electrode 23. Thereafter, based on the markers 24, the mask of the SiO2 film 26 for isolation layer forming is provided from on the electrode 23 to the periphery thereof, then O2 ions are implanted, thus element isolation layers 27 of high resistance are formed at the both end parts of the layers 25, and later the film 26 is removed. |
