发明名称 SEQUENCE CHECKING CIRCUIT
摘要 PURPOSE:To check even complicated working regulations by changing the contents of a read-only memory (ROM) and to facilitate the change of the checking function, by deciding the working regulations with the contents of the ROM. CONSTITUTION:A terminal 1 to which a control command is supplied is put into a serial-parallel converting circuit S/P, and a parallel output 2 is fed to the 1st address input 3 of an ROM. A data output 4 is connected to a decoder circuit DEC as well as to the 1st input of a flip-flop circuit F/F. The outputs 7 and 8 of the circuit DEC are connected to output terminals. An executable line 12 is connected to the 3rd address input 11 of the ROM. The ROM stores the states of all combinations among states, commands and the executable line and delivers the next state in accordance with the state of combination.
申请公布号 JPS58169602(A) 申请公布日期 1983.10.06
申请号 JP19820053081 申请日期 1982.03.31
申请人 FUJITSU KK 发明人 OGURA TAKAYUKI;SHINODA RIYOUICHI;YAMAZAKI HAJIME
分类号 G05B23/02;G06F11/28 主分类号 G05B23/02
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