发明名称 SELF-CLOCK DEVICE
摘要 PURPOSE:To avoid the effect of jitter and to make the large scale circuit integration easy, by presetting a preset value formed by a decoder to a programmable counter when an input synchronizing signal is inputted to the counter. CONSTITUTION:The programmable counter 3 has a clock input terminal, preset data input terminal, a preset enable terminal, a data output terminal and a carry output terminal. The counter 3 is returned to the initial value when a value N to a period tau is exceeded and outputs a pulse signal every time when the value exceeds N. A preset value formed with a decoder 2 is applied to a preset data input teminal of the counter 3. When the input synchronizing signal is inputted to the counter 3, the count value of the counter 3 becomes the preset value.
申请公布号 JPS58170225(A) 申请公布日期 1983.10.06
申请号 JP19820052665 申请日期 1982.03.31
申请人 FUJITSU KK 发明人 WADA TADAHIRO
分类号 G11B20/14;H03L7/00;H03L7/181 主分类号 G11B20/14
代理机构 代理人
主权项
地址