| 摘要 |
PURPOSE:To realize a high-speed operation for an integrated circuit as a whole, by having the 2nd circuit obtained by connecting the 1st and 2nd terminals to an earth and a power supply respectively and having signals of about double as much as the conventional number of signals to make it possible to omit the number of logical circuits. CONSTITUTION:The gate electrodes of an FET pair (P1 and Q1) are connected with correspondence to a terminal pair (A' and A). The drain and source electrodes of a D type FETP1 are connected to a power supply terminal X and an output terminal Y' respectively. The drain and source electrodes of an E type FETQ1 are earthed to the terminal Y'. Thus a circuit C is formed. At the same time, the gate electrodes of an FET pair (P2 and Q2) are set opposite to the pair (A' and A) respectively. The drain and source electrodes are connected to the terminal X and an output terminal Y respectively. The drain and source electrodes of an E type FETQ2 are connected to the terminal Y and an earth respectively. Thus a circuit C' is formed. In such a way, a circuit pair (C and C') is obtained. The signals having genuineness and spuriousness different from each other are delivered to the circuits C and C'. |
