VERFAHREN ZUM HERSTELLEN VON INTEGRIERTEN MOS-FELDEFFEKTTRANSISTORSCHALTUNGEN IN SILIZIUMGATE-TECHNOLOGIE MIT SILIZID BESCHICHTETEN DIFFUSIONSGEBIETEN ALS NIEDEROHMIGE LEITERBAHNEN,申请号DE19823211761-传众专利搜索

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发明名称	VERFAHREN ZUM HERSTELLEN VON INTEGRIERTEN MOS-FELDEFFEKTTRANSISTORSCHALTUNGEN IN SILIZIUMGATE-TECHNOLOGIE MIT SILIZID BESCHICHTETEN DIFFUSIONSGEBIETEN ALS NIEDEROHMIGE LEITERBAHNEN
摘要
申请公布号	DE3211761(A1)	申请公布日期	1983.10.06
申请号	DE19823211761	申请日期	1982.03.30
申请人	SIEMENS AG	发明人	SCHWABE,ULRICH,DR.PHIL.;NEPPL,FRANZ,DIPL.-PHYS.DR.;HIEBER,KONRAD,DIPL.-PHYS.DR.
分类号	H01L29/78;H01L21/28;H01L21/285;H01L21/336;H01L21/768;H01L29/45;H01L29/49;(IPC1-7):H01L21/72;H01L21/90	主分类号	H01L29/78
代理机构		代理人
主权项
地址

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