发明名称 DIGITAL DATA PROCESSOR
摘要 <p>PURPOSE:To perform the processing at a high speed even in case the data having a varying coefficient is processed, by using two counters as address pointers of a data storing memory and at the same time by setting two routes through which the data reaches a multiplier. CONSTITUTION:Counters 91 and 92 can set initial values with an instruction within an instruction memory 1 and also can count up or down. These counters are provided as address pointers of a data storing RAM 4. In addition, signal lines 101-1 and 101-2 are extended from a constant memory 3, and signal lines 102-1 and 102-2 are extended from the RAM 4. The lines 101-1 and 102-1 are connected to a signal line 104, and the line 104 is connected to the input of one side of a multiplier 8 via a signal line 107. On the other hand, the lines 101-2 and 102-2 are connected to the other input of the multiplier 8 via a selector 52 and a signal line 106. Therefore the data can be set to the multiplier 8 through two routes and at one time.</p>
申请公布号 JPS58169674(A) 申请公布日期 1983.10.06
申请号 JP19820053067 申请日期 1982.03.31
申请人 TOKYO SHIBAURA DENKI KK 发明人 SHIRAKAWA MASAKAZU;SUGAI MASAMICHI;MIYATA MISAO
分类号 H03H17/02;G06F9/34;G06F17/10;G06F17/14 主分类号 H03H17/02
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