发明名称 ERROR PROCESSING SYSTEM OF CONTROL AND STORAGE DEVICE
摘要 PURPOSE:To prevent a system from being shut down without causing an increase in hardware size and a decrease in operation speed, by providing an substitute storage device 6 for a control and storage device, and storing an error address and correct information to be stored in the address in a pair. CONSTITUTION:The control and storage device 1 and the substitute storage device 6 are cleared in an initial state and a service processor SVP sets a program from an external storage device in the control and storage device 1 through a CSDR3 and a line 11. On the basis of the contents of the device 1, processing is performed and once a one-bit error is detected during the operation of the device 1, an error detecting and correcting circuit 4 sets corrected information in a microinstruction register MIR5. If an uncorrectable error is detected, the circuit 4 actuates an address counter 8 and the contents of the device 6 are read in a register 7; and a comparator 9 compares them with the output of a microinstruction counter 2 to detect a coincident signal and an interruption for a machine check is reported to the SVP, thereby preventing the system from being shut down.
申请公布号 JPS58169254(A) 申请公布日期 1983.10.05
申请号 JP19820052076 申请日期 1982.03.30
申请人 FUJITSU KK 发明人 MOGI HITOSHI
分类号 G06F9/22;G06F11/16;G11C29/00 主分类号 G06F9/22
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