发明名称 CONTROL SYSTEM OF PROGRAM COUNTER PROVIDED WITH INPUT CONDITION SELECTOR
摘要 PURPOSE:To continue processing securely from a state existing right before a DMA request when DMA processing ends, by providing an FF for holding a plural-bit flag for conditional branching to be inputted to a selector, and stopping a clock to the FF by the output of a delay circuit for permitting the DMA processing. CONSTITUTION:A program counter 1 with an input condition selector is connected to an ROM4 stored with a program and this counter 1 is provided with an ROM2, FF3, and selector 5. Further the FF10 which inputs the plural-bit flag for conditional branching to the selector 5 and an AND circuit 11 for controlling the clock to the FF10 are provided. When the DMA request is generated, a DMA permitting signal outputted from the delay circuit 9 is applied to the circuit 11 to stop the clock to the FF10 by the output of the circuit 11, and the flag for conditional branching before the DMA is performed is held in the FF10 to continue the processing securely from a state existing before the DMA request.
申请公布号 JPS58169248(A) 申请公布日期 1983.10.05
申请号 JP19820052093 申请日期 1982.03.30
申请人 FUJITSU KK 发明人 MORIYAMA YUTAKA;MIYASAKA AKIRA;HAYASHI TATSUKI
分类号 G06F13/28;G06F9/32 主分类号 G06F13/28
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