发明名称 MIS TYPE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To shorten the access time of a memory device by constructing an MIS type transistor having a threshold value lower than an enhancement type transistor used for other circuit section in the memory with a transfer gate transistor, thereby accelerating the transfer speed of information from a bit line to a data line. CONSTITUTION:Since the threshold voltages of transistors Q7, Q8 are reduced, the difference between the output voltage Y of a column decoder CD and the voltage of a bit line BL becomes, as shown in drawings, larger than the threshold voltages of the transistors Q7, Q8 in a shoft time from the start of rising the voltage Y, and the transistors Q7, Q8 start rapidly conducting. Since the gm of the transistors can be increased as compared with the case of the voltage between the same gate and the source by reducing the threshold voltages of the transistors Q7, Q8, the transfer speed of the information from the bit line to the data line can be further accelerated.
申请公布号 JPS58168272(A) 申请公布日期 1983.10.04
申请号 JP19820050085 申请日期 1982.03.30
申请人 FUJITSU KK 发明人 AOYAMA KEIZOU;YAMAUCHI TAKAHIKO;SEKI TERUO
分类号 G11C11/412;G11C7/10;G11C11/419;H01L21/8244;H01L27/11;H01L29/78 主分类号 G11C11/412
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