发明名称 CONVERTING CIRCUIT OF SIGNAL LEVEL
摘要 PURPOSE:To increase the speed of response, by applying the reference voltage to the collector and the base of a multi-emitter transistor of an input circuit via a diode and a resistance and supplying the output of the reference voltage to a converting part of signal level. CONSTITUTION:When the input signal supplied from a TTL circuit 1 is set at a low level, emitters E1 and E2 of a multi-emitter transistor TRQ1 are turned on and off, respectively. Thus the base potential of the TRQ1 is lower than the reference voltage which is supplied to the emitter E2 from a reference voltage generating circuit 3. Then a TRQ2 and a TRQ3 of a signal level converting part 4 are turned off and on, respectively. Therefore output points OUT1 and OUT2 are set at a low level and a high level, respectively. When the input signal from the circuit 1 becomes higher than a prescribed level, E1 and E2 are turned off and on, respectively. Thus OUT1 and OUT2 are set at a high level and a low level, respectively. The time of response is decided by the time constant obtained by a resistance R1 and a floating capacity CS connected to the collector of the TRQ1. In this case, the R1 can be set at a small value when the outflow current of the E1 is set even by connecting a diode D1 in series to the R1. Thus the speed of response can be increased.
申请公布号 JPS58166831(A) 申请公布日期 1983.10.03
申请号 JP19820048886 申请日期 1982.03.29
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 WADA TAKESHI;UCHIDA HIDEAKI;SHIBAKAWA SHIYUUICHI
分类号 H03K19/013;H03K19/018;(IPC1-7):03K19/092 主分类号 H03K19/013
代理机构 代理人
主权项
地址