| 摘要 |
PURPOSE:To inhibit packet processing even when an interruption of a packet from a node other than an opposite-station node contained in a preset virtual circuit is caused, by providing a means for discriminating the address of a transmitting-origin node at a high speed in a node. CONSTITUTION:In an address storage part 37, the address of its station node is stored, but once the virtual circuit is set between the node and an opposite-side node, the address of the opposite-station node in the virtual circuit is stored in the storage part 37 from another circuit in a device through a lead 54. A packet 20 received from a coaxial cable through a transceiver is decoded firstly by a decoder part 31 and stored in a buffer part 33 through a shift register part 32. Received data, on the other hand, is sent from the decoder part 31 to a carrier sense part 34 and then transferred to a sink detection part 36 through a decision part 35. The sink detection part 36 sends a timing signal to the address storage part 37 and the stored addresses of its station and opposite station are transferred to an address comparison part 38 to be compared with an address received by a shift register part 32. |
