| 摘要 |
PURPOSE:To decrease the output time constant of a D/A converter and to increase its conversion speed by cascading a transistor (TR) between a current sum line and a load resistance and reducing the capacity. CONSTITUTION:The current of the current sum line 14 of the D/A converter flows into a resistance RL 17 for current-voltage conversion through a TR16 impressed with a DC bias VB at its base and appears at an output terminal 18 as the output voltage of the D/A converter. The time constant depends upon the load resistance RL 17, the collector-base capacitance Ccb 19 of the TR16, and capacitance Ccs 20 between the collector and a semiconductor substrate and the capacity is reduced to decrease the time constant. The settling time is therefore shortened, thereby realizing the high-speed operation. |
