发明名称 SIMULTANEOUS TRANSMISSION SYSTEM FOR PLURAL DATA
摘要 PURPOSE:To transmit simultaneously plural serial data which differ in pulse width through one transmission line and to regenerate respective data signals separately on a reception side. CONSTITUTION:At a transmission side, two serial data signals D1 and D2 are inputted to an EXOR1 and data signals D3 and D4 are inputted to an EXOR1'; and their output signals (a) and (b) are inputted to an EXOR1'', which transmits one composite data signal. On the reception side, the composite data signal is integrated by plural integrating circuits 2-5 and branched to four branching circuits. The integrating circuit 2 has the greatest time constant and the integral output signal of the received input signal is shaped by a buffer amplifier 6 with a specific threshold value to obtain the regenerated data D1' of the data signal D1. In the same way, the time constant of the integrating circuit 3 corresponds to the data signal D2 and on the basis of the output signal of the integrating circuit 3, a data signal D2' corresponding to the data signal D2 is obtained. Similarly, correspoinding data signals are obtained.
申请公布号 JPS58164342(A) 申请公布日期 1983.09.29
申请号 JP19820046209 申请日期 1982.03.25
申请人 NIPPON DENKI KK 发明人 SHIMADA MASAYUKI
分类号 H03M5/08;H04J3/00;H04J3/16;H04L25/49 主分类号 H03M5/08
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