| 摘要 |
<p>PURPOSE:To attain an economical constitution and also to accelerate discrimination of signals, by adding the proportion multiplying result of output with each discrete Fourier converting circuit with an overlap circuit and then having an optional overlap. CONSTITUTION:The synthetic arithmetic outputs of a discrete Fourier converting (DFT) circuit DFTa using a trinagular wave window function, a DFT circuit DFTb using a triangular wave window function of inverted phase and a DFT circuit DFTc using no window function are applied to overlap circuits OVP1- OVPn via buffer circuits BFa, BFb and BFc respectively. Proportion multiplying circuits RM1a-RMnc perform multiplications of prescribed constants so as to obtain triangular wave window functions of different timings respectively. The results of these multiplications are totalized by adder circuits AD1-ADn. A selector SEL selects the outputs of circuits OVP1-OVPn with the timing signal given from a timing generator TG.</p> |
