发明名称 MANUFACTURE OF INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain an insulated gate field effect transistor having no negative resistance, excellent breakdown resistance and less irregular ON resistance. CONSTITUTION:A drain mask region 13 formed to surround a drain region 2 and a gate electrode 6 are simultaneously formed in a pattern, and a source region 3 and a buried earth layer 10 are formed with the secound mask material 16 and the electrode 6 as masks. The mutual position relationship among the end of the gate side of the source region 3, the end of the gates side of the buried earth layer 11, the drain region 2 and the offset gate region 4 can be unitarily determined by the gate electrode 6 formed in a pattern simultaneously and the drain mask region 13. Accordingly, this buried earth layer 10 can completely cover the directly under the source region 3, and an offset gate IGFET having no negative resistance and excellent breakdown resistance can be obtained. The gate channel length and the irregularity in the offset gate length can depend only upon the machining accuracy at the patterning time of the gate electrode and the drain mask without addition of matching error, thereby reducing the irregularity of the ON resistance.
申请公布号 JPS58162067(A) 申请公布日期 1983.09.26
申请号 JP19820045880 申请日期 1982.03.23
申请人 NIPPON DENKI KK 发明人 SUZUKI TOSHIYUKI
分类号 H01L29/78;H01L29/06;H01L29/08;(IPC1-7):01L29/78 主分类号 H01L29/78
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