| 摘要 |
PURPOSE:To form a transversal filter having a multi-tap without reducing the system efficiency, by providing a shift register for 1 clock delay, on an adder between each unit constituting the transversal filter. CONSTITUTION:Before or behind and adder for adding the partial sum of each unit for constituting a transversal filter, a shift register 403 for 1 bit delay is inserted. Subsequently, an output of an accumulator ACC for accumulate-adding an output of a multiplier 203 is inputted to an adder 205 through a shift register 401 and a data selector 402, by setting the timing by a chip counter 404. In this way, a clock of the adder 205 can be made constant, irrespective of the number of units. |
