发明名称 A/D CONVERTING CIRCUIT
摘要 PURPOSE:To realize a high-speed operation of an A/D converter with simple constitution, by combining a delta modulating circuit and an up-down counter. CONSTITUTION:When both input and output of a D-FF7 are set at H, i.e., the output -Q of an FF3 is held at H consecutively for >=2 cycles of a clock pulse, the output of an AND gate 8 is set at H. And the contents of an up-down counter 10 are counted up. When both the input and output of the FF7 are set at L, the output of a negative logic NAND gate is set at H. Thus the contents of the counter 10 are counted down. In such a way, it is possible to produce the analog voltage information at the counter 10 in the form of digital value by counting up or down the contents of the counter 10 as long as H or L is continuous with each clock cycle. In addition, a high-speed operation is possible since the up-down counting is carried out with each cycle for the response to a change of input voltage.
申请公布号 JPS58161530(A) 申请公布日期 1983.09.26
申请号 JP19820045001 申请日期 1982.03.19
申请人 MATSUSHITA DENKI SANGYO KK 发明人 IZUMI YOSHIHIRO
分类号 H03M1/48;H03M1/46 主分类号 H03M1/48
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