| 摘要 |
PURPOSE:To execute A/D conversion at a short cycle time, by always operating an A/D converter by use of 2 sample holding (S/H) circuits whose acquisition time is long (low speed). CONSTITUTION:Assuming, first, as an S/H circuit 3 and an A/D converter 6 are connected by a switching circuit 5, if a sample holding instruction is given to the S/H circuit 3, an analog signal AS inputted in that case is sample-held. In accordance with a sample-held value, A/D conversion is executed by the A/D converter 6 by an A/D converting time TD which is shorter than a sample holding time TH1, and a digital signal DS is outputted. When it ends, the switching circuit 5 connects an S/H circuit 4 to the A/D converter 6, A/D conversion is executed in the same way as above, and the digital signal DS is obtained. The S/H circuit 3 can be returned to a sampling state which is capable of the sample holding operation at any time after an acquisition time TS1 elapsed. |
