Subthreshold load element for static ram cell.

摘要

A transistor operated in the subthreshold regime, e.g., a thick field parasitic FET, is utilized as a load element to maintain the state of a static RAM cell. The RAM cell is constructed with minimum spacing between devices to insure that the subthreshold current of the parasitic FET is sufficient to hold the memory state of the cell. This provides a useful purpose for a device characteristic (subthreshold leakage) that previously caused a problem in the increased isolation requirements; and additionally provides a major density improvement in SRAM cells.