| 摘要 |
PURPOSE:To realize planar type element structure whose series resistances between a source and a gate, and between the gate and a drain are reduced, and to obtain an integrated element of high performance by a method wherein an N type active layer is provided continuously to a gate region and source and drain regions in the same process. CONSTITUTION:The gate region pedestal type part 13 is formed on the surface of a semiinsulating GaAs substrate 11, and the N type GaAs active layer 14 is formed according to the epitaxial growth method. N<+> type conductive layers 16 are made to epitaxially grow selectively on the active layer 14 in the source and drain regions on both the sides of the pedestal type part 13, and thicknesses thereof are set as to form the same plane with the surface of the active layer 14 on the pedestal type part 13. Insulating films 17 are provided, and P type impurities are diffused thermally to form a P<+> type diffusion layer 18 of gate junction region. The insulating films 17 are removed, and the gate electrode 19, the source electrode 20 and the drain electrode 21 are provided. The boundary faces between the N type active layer 14 and the N<+> type conductive layers 16 constitute junctions having favorable crystallinity, and the effective distances between the source and the gate and between the gate and the drain can be shortened. |
