发明名称 BIPOLAR RAM
摘要 PURPOSE:To simplify the circuit constitution, by using a differential tri-digit write circuit. CONSTITUTION:A write circuit WA impresses write data signals DIN having opposite phase to bases of transistors (TRs)Q6, Q7. A write/readout control signal WE is impressed to a base of a TRQ8, and based on a collector output voltage of the TRs Q6, Q7, reference voltages V1, V2 of tri-digit according to the write/readout are formed, which is applied to the base of current switching TRs Q4, Q5 having the emitters of which are connected to a couple of data lines D0 of a memory array.
申请公布号 JPS58159291(A) 申请公布日期 1983.09.21
申请号 JP19820040802 申请日期 1982.03.17
申请人 HITACHI SEISAKUSHO KK 发明人 WADA TAKESHI
分类号 G11C11/414;G11C11/416 主分类号 G11C11/414
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