发明名称 PICTURE INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To decrease the share of a load for a microcomputer and a bus, by providing a refresh control function and an access function for a buffer memory and controlling the functions directly not via a microcomputer bus. CONSTITUTION:Frequency division circuits 17, 19 distinguish an access period and a refresh period so as not to be overlapped and the transfer timing of a picture signal is adjusted with a serial/parallel converting circuit 20 and a latch circuit 23, then a reader 1 generates a serial reading picture signal (a) continuously without being effected with the refresh period. The reading picture signal (a) is transferred in high speed not through a bus 5 of a microcomputer 4 and written in a buffer memory 6 in parallel by 8-bit, then the microcomputer 4 executes other information processing jobs during this period.
申请公布号 JPS58154964(A) 申请公布日期 1983.09.14
申请号 JP19820037168 申请日期 1982.03.11
申请人 HITACHI SEISAKUSHO KK 发明人 NAKAMURA KOUZOU
分类号 H04N1/21;G06T1/00;H04N1/00 主分类号 H04N1/21
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