| 摘要 |
PURPOSE:To ensure processing at a high speed, by adding newly an instruction circuit for simulation, and calculating both outputs of a circuit which decodes a function field within a simulation data and a circuit which discriminates the combination of circuits and data. CONSTITUTION:A simulation data is read out of a storage device 10 and supplied to an operator 11. A function decoding circuit 12 decodes a function field data 22 and turns on signal lines 30-32 in response to the AND, OR and exclusive OR respectively. A data combination deciding circuit 13 turns on signal lines 40-44 by the numeric condition of logic values 1 and 0 within an input data field as well as by the presence or absence of an unfixed code X of the logic value. A PN field producing circuit 14 receives the output signal of above- mentioned two circuits and produces an output signal 21 to write it to the device 10. As a result, it is possible to process the processing instruction per data with an instruction. Thus the simulation processing is performed at a high speed. |
