| 摘要 |
<p>PURPOSE:To prevent an abnormal operation of a program controller, by providing a circuit for detecting an abnormal state of an address indicated by an operand part, and a circuit for inhibiting write of a data by generating an abnormal state interruption to the address. CONSTITUTION:An operation control part 11 is connected to a storage part 12, an input/output point 13, a fixed storage part 31 consisting of a microprogram muPG, an address abnormal state detecting circuit 32 for detecting an abnormal state of an object area address designated in accordance with a detecting bit of the storage part 31, and a write signal controlling circuit 33 for controlling a write signal to the storage part 12 and the input/output point 13 in accordance with a command from the circuit 32. When writing a data to the storage part 12 from the control part 11, a muPG address is outputted to the storage part 31, and from the storage part 31, an instruction of a designated address is sent to the control part 11, and an address abnormal state detecting bit is sent to the circuit 32. When this bit is ''1'', the circuit 32 sends out an address abnormal state interrupting signal and a wirte executing inhibition control signal to the control part 11 and the circuit 33, respectively. The circuit 33 receives it, and inhibits to write a data to the storage part 12 and the input/output point 13.</p> |
