发明名称 PULSE COUNTING SYSTEM
摘要 PURPOSE:To prevent flickering due to minute fluctuation in a measuring value and the shift in synchronism of an input pulse and to attain stable display, by displaying an operating value adding or subtracting a value in response to a prescribed number or the newest count value, to/from the newest count value, depending on the increase/decrease of the newest count value. CONSTITUTION:The input pulse is counted at a counter 2, stored in a latch circuit 4 via a gate circuit 3 and the count value is displayed on a display 6. The count value stored in the circuit 4 and the display value of the display 6 are compared at a comparator 7, and when the count value and the display value are the same or the count value is increasing to the display value, a load pulse is given to the circuit 4 from the comparator 7 via an OR gate 8, the measuring value is inputted to the circuit 4 for the revision of display. When the count value is decreasing, the count value is added with a prescribed value at an operator 9 for display. The preceding value and the output of shift registers 101, 102 inputting the newest count value are compared at a comparator 11, and it is detected that the value is made stable for a prescribed value, and the count value is revised at the stable state.
申请公布号 JPS58148524(A) 申请公布日期 1983.09.03
申请号 JP19820031278 申请日期 1982.02.26
申请人 NIHON SEIKI KK 发明人 ANDOU RIYUUICHI;KABASAWA YOSHIHARU;SHIGEYAMA IKUO
分类号 H03K21/08;H03K21/18;(IPC1-7):03K21/18 主分类号 H03K21/08
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