| 摘要 |
PURPOSE:To suppress the increase of demodulated distortion even at wide sampling timing intervals, by processing the sampling interval after interpolation in a demodulation circuit with sampling processing. CONSTITUTION:An output of an LPF in the sampling timing is stored at a register 22, an output of the LPF before one sampling timing is stored in a register circuit 23, and a difference Ta is obtained at an output of a subtractor 24. A value of DELTAS=Ta/4 (in case of interpolation of each sampling timing at four equal intervals) is obtained by a divider 25. The content of the circuit 23 is stored in a register circuit 28 through a signal switching device 27 before the interpolation. The value of DELTAS is added to the content of the circuit 28 at an adder 26 at each timing of interpolation. The output of the circuit 28 is given to an amplitude comparator 29 and a demodulated output signal 30 is obtained. In this case, the maximum value of the demodulation distortion is equal to the time interval of the interpolation timing, e.g., 1/4 of the time interval of the sampling timing, allowing to improve the demodulation distortion remarkably. |
