| 摘要 |
PURPOSE:To shorten the time up to outputting of a normal data and to eliminating the need for a circuit for setting inhibition signal time, by turning off a flip-flop when a counter goes up to a prescribed value. CONSTITUTION:When a reset signal is inputted, a circuit 30 is reset, a circuit 21 is set, and a circuit 25 is supplied with a signal from the terminal Q of the circuit 21 to output 0, thereby supplying count data to a circuit 27 through a circuit 26. A circuit 28 supplies a clock signal to a circuit 29, which inverts the input signal and supplies it to the WE (write enable terminal) of the circuit 27. According to the count data, the contents of the circuit 27 are rewritten into 0 data. The clock signal is supplied to a circuit 30 to perform counting-up operation and the output is supplied to circuits 24 and 31. When the counting to a final RAM address is performed, the circuit 31 supplies the signal to the terminal K of the circuit 21 and the signal of the terminal Q of the circuit 21 is reset synchronously with the clock signal, thus completing the clearing operation of an RAM. |
