发明名称 DIGITAL SIGNAL DECIDING METHOD
摘要 PURPOSE:To decrease a bit error rate by giving weight corresponding to a sampled value at every sampling point in one time slot while considering an S/N ratio at every sampling point, and making a binary decision on the basis of the sum of sampled values. CONSTITUTION:A sampling circuit samples a signal obtained by demodulating a digital modulated wave from an input terminal 1 by sampling pulses from a terminal 3 to detect a sampled value fi. A weight value gi to this sampled value fi is stored in an ROM5 previously and read out successively to a switch circuit 7 by a counter 6. Then, the sampled value fi and weight value gi are ANDed and sent to an adder 9 to be accumulated through a holder 10. This accumulated value is compared 12 with the output of a threshold value setting circuit to compare the total S of weighted sampled values in one time slot section with the threshold value T of the circuit 11. The output is held 13 with a reset signal from a terminal 4 and is outputted 14.
申请公布号 JPS58147265(A) 申请公布日期 1983.09.02
申请号 JP19820030356 申请日期 1982.02.26
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 MORIKURA MASAHIRO;NAKAJIMA SHIGEO
分类号 H04L25/08;H04L25/06 主分类号 H04L25/08
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