发明名称 RECORDING AND REPRODUCING CIRCUIT OF DATA SIGNAL
摘要 PURPOSE:To record and reproduce clock pulses and a data signal through simple constitution by limiting the clock pulses to a prescribed frequency band through a band-pass filter and sending them out as a recording clock signal, and generating a composite signal from the clock pulses and data signal and limiting it to a prescribed frequency band through a band-pass filter. CONSTITUTION:The clock pulses CK are limited to the prescribed frequency band through the band-pass filter BPF1 to obtain a component consisting principally of a basic wave, which is sent out as the recording clock signal SRC. The clock pulses CK and data signal D are ANDed by an AND gate G5 and then supplied to an input IN1 of an adder AD; and it is further supplied to the other input IN2 of the adder AD after the data signal D is inverted by an inverter IN5 to obtain a signal (d) containing an AC component. From the signal (d), the AC component is extracted by a capacitor C and the band-pass filter BPF2 limits its frequency band to obtain a signal (e) consisting of only a basic wave component as well as the recording clock signal SRC, thereby sending a recording data signal SED out.
申请公布号 JPS58147808(A) 申请公布日期 1983.09.02
申请号 JP19820030074 申请日期 1982.02.26
申请人 SHIN NIPPON DENKI KK 发明人 YAMAZAKI TAKAHIRO;ISHIWATARI NAOKI
分类号 G11B20/16;G11B20/14 主分类号 G11B20/16
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