发明名称 Circuit arrangement for the evaluation of the pilot in carrier frequency systems
摘要 In this arrangement, the received pilot controls a group amplifier. The pilot DC is applied to a first alarm generating circuit. To achieve that a keyed pilot can be evaluated without influence from channel signals, the settling times of the pilot rectifier arrangement are shorter than the keying interval of the keyed pilot. The pilot DC is applied to a second trigger circuit which responds to the keying interval of the keyed pilot. Both alarm generation circuits are logically combined with one another by an OR gate.
申请公布号 DE3148653(A1) 申请公布日期 1983.09.01
申请号 DE19813148653 申请日期 1981.12.09
申请人 FELTEN & GUILLEAUME FERNMELDEANLAGEN GMBH 发明人 SCHOTT,HELMUT,ING.GRAD.;REICHELT,INGO,DIPL.ING.;SCHNEIDER,RUDOLF,DIPL.ING.
分类号 H04J1/16;(IPC1-7):H04J1/16 主分类号 H04J1/16
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