| 摘要 |
PURPOSE:To obtain an excellent error rate characteristic, by forming a modulation and demodulation system using two-bit cos delay detection output as a data series, and using a 1-bit sin delay detection output as a check series. CONSTITUTION:Reception data are detected with a delay at a delay detection circuit 15, and 1-bit sin delay detection demodulation output and a 2-bit cos delay detection demodulating output are obtained at terminals 16 and 17 respectively. The output at the terminal 16 is applied to a 1-bit delay circuit 18 and an exclusive logical sum 19, and the output at the terminal 17 is applied to an exclusive OR circuit 21 and a 4-bit delay circuit 22. The output of the circuit 18 is given to the circuit 19, the output of the circuit 19 is given to the circuit 21, and when they are dissident, 1 is outputted and an error correction pulse is generated at a syndrome detection circuit 23. This pulse is applied to an exclusive OR circuit 24. The 2-bit cos delay detection demodulating output delayed from the circuit 22 is applied to the circuit 24, this is corrected at an error correction pulse and outputted to an output terminal 25. |
