发明名称 LOGICAL CIRCUIT FOR FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To attain high speed, low power consumption and stable operation, by connecting a current source to a terminal to which source terminals of input stage of a field effect transistors of two inverters are connected in common. CONSTITUTION:A source 11 connecting sources of FETs 1, 2, 3-5 in common is connected to a source power supply voltage terminal VSS via a constant current source 12. A load 13 is connected to a power supply voltage terminal VDD and a drain of the FET1 is connected to the VDD via a load 14. To the gate of FETs 15, 16 in which the source is connected to the VSS via diodes 17, 18 and resistors 19, 20 and the drain is connected to the VDD, the drains of the FETs 1-5, to pick up an NOR output of the input to the FETs 2-5 from a connecting point F1 between the diode 17 and the resistor 19 and an OR output from a connecting point F2 between the diode 18 and the resistor 20.
申请公布号 JPS58145237(A) 申请公布日期 1983.08.30
申请号 JP19820027222 申请日期 1982.02.22
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KATSU SHINICHI;SHIMANO AKIO;NANBU SHIYUUTAROU
分类号 H03K19/0952;H03K19/017;H03K19/094 主分类号 H03K19/0952
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